Designing Solder Paste Compensation Coefficients for Pin-in-Hole (PIH) Reflow Process

1. Compensation Principle

• Functional Requirements:

  • Offset hole wall absorption (consumes 15~35% paste)

  • Ensure complete vertICal fill (target fill rate ≥95%)

• Core Formula:
  Actual Paste Required = V_hole​×ρ×(1+K_comp​)

  • ${\mathrm{<br>}}_{\text{<br>}}$

  • $\rho$: Paste density (typically 8.4 g/cm³)

  • ${\mathrm{<br>}}_{\text{<br>}}$: Compensation coefficient (0.3~0.7)

2. Composition of ${\mathrm{<br>}}_{\text{<br>}}$

3. Step Stencil Design

• Thickened Zone:

  • Centered on hole, radius = hole dia. + 0.5mm

• Thickness Scheme:

  Board Thick(mm)	Base Stencil(μm)	Step Added(μm)
  1.6	120	+40~60
  2.4	130	+60~80
  3.2	150	+80~100

4. Experimental Validation

• DOE Matrix:

  | Factor          | Level 1     | Level 2     | Level 3     |  |-----------------|-------------|-------------|-------------|  | K compensation  | 0.3         | 0.5         | 0.7         |  | Print pressure  | 0.25 MPa    | 0.35 MPa    | 0.45 MPa    |  | Reflow peak     | 240°C       | 245°C       | 250°C       |

• Metrics:

  • X-Ray fill rate (≥95%)

  • Cross-section voiding (≤10%)

  • Push test (IPC-7092 compliant)

5. Dynamic Compensation

• Pin Type Adaptation:

  Pin Form	K Adjustment	Basis
  Cylindrical straight	$\mathrm{<br>}\mathrm{<br>}$	No self-alignment
  Square tapered	$\mathrm{<br>}\mathrm{<br>}$	Enhanced capillary flow

• Array Layout:

  • Peripheral holes: $\mathrm{<br>}\mathrm{<br>}$ (faster edge cooling)

6. Failure Mode Correction

7. Digital Control Tools

• SIMulation:

  • Ansys Sherlock for solder flow prediction (inputs: hole size/CTE/material)

• SPC Monitoring:

  • Real-time 3D SPI paste volume CPK≥1.33